EE 134 Digital Integrated Circuit Layout and Design

Winter 2004

Instructor: Prof. Roger Lake, x2122, , http://www.ee.ucr.edu/~rlake

Office hours: 4-5pm M-F BRNHL A229

TA: Nick Bruque, x4515, , http://www.ee.ucr.edu/~nbruque

Office hours: TBD

Lecture: TR 9:40-11am SPR 2356

Labs: M 12:10-3pm BRNHL B156

Objective: The objective of this course is to introduce the student to CMOS digital integrated circuit layout and design. This course covers CMOS integrated circuit design, layout and verification using the CADENCE and PSPICE CAD tools. Topics covered are the BSIM SPICE model, digital models, inverters, static logic gates, transmission-gates, flip-flops, and dynamic logic gates.

Text: “CMOS Circuit Design, Layout, and Simulation,” 2nd ed., R. J. Baker, H. W. Li, and D. E. Boyce, IEEE Press, NY, 1998. ISBN: 0780334167.

Online references:

http://www.ee.ucr.edu/~rlake/EE134.html

http://cmosedu.com/cmos1/book.htm

Laboratory: We will meet each week for the first 4 weeks to practice using the CAD software performing small layout and simulation assignments. From the 6th week on, the lab time will be used for the design project.

Exams: Midterm

Grades: 10% assignments, 20% lab, 50% design project, 20% midterm

Lecture material and announcements:

Students are responsible for all lecture material and announcements.

Course Contents

Week 1: Chs. 1&2. Introduction. The n-well, pn junction, capacitance, resistance, and delay.

Week 2: Chs. 2&3. The n-well, pn junction, capacitance, resistance, and delay.

Week 3. Chs. 3&4. Metal layers, parasitics, electromigration, padframe layout, poly-layers, MOSFET layout and standard frame.

Week 4. Chs. 5&6. MOSFET operation summary, BSIM SPICE model

Week 5. Chs. 7. CMOS passive elements

Week 6. Chs. 10&11. Digital Models and the inverter. Assign student design projects.

Week 7. Chs. 11. Inverter: switching point voltage, switching times, layout, latchup, and design.

Week 8. Ch. 12. Static logic gates, switching point voltages, speed, and layout.

Week 9. Ch. 13&14. Transmission gate, flip-flops, and dynamic logic gates.

Week 10. Memory, special circuits.