ELEC 2200 Digital Logic Circuits

Fall 2008 – Section 002 (MWF 2-2:50pm BR238)

Instructor: Vishwani D. Agrawal, Office hours: 3:00-4:00PM MF Office: 323 Broun Hall.

Teaching Assistant: Donglin Hu, , 334-844-1897, Broun 163, office hours: Monday 3-5PM.

Course website: http://www.eng.auburn.edu/~vagrawal/COURSE/E2200_Fall08/course.html

2002 Catalog Data: ELEC 2200. DIGITAL LOGIC CIRCUITS (3). Prereq. COMP 1200. Electronic devices and digital circuits; binary numbers; Boolean algebra and switching functions; gates and flip-flops; combinational and sequential logic circuits; hierarchical design of digital systems; computer-aided design tools for digital design, simulation, and testing.

Textbook: Digital Logic Circuit Analysis and Design, by V.P. Nelson, H.T. Nagle, B.D. Carroll and J.D. Irwin, Prentice-Hall, 1995.

Goals: This course introduces the student to the design of digital logic circuits, both combinational and sequential, and the design of digital systems in a hierarchical, top-down manner. The student is also introduced to the use of computer-aided design tools to develop digital circuits.

Prerequisites by topic: Introductory computer programming in a high level language.

Course Outline & Schedule:

Topics and Textbook Sections

1 Introduction to digital systems 0.2

2 Number systems and codes 1.1-1.5

3 Boolean algebra 2.1

4 Switching functions and canonical forms 2.2

5 Design and analysis of combinational circuits 2.3-2.5

6 Circuit minimization via Karnaugh maps, Test #1 9/19 3.1-3.7

7 Timing issues, Schematic capture and simulation tools 3.8, 2.7

8 Common combinational logic circuits 4.1-4.7

9 Latches and flip flops 6.3-6.4

10 Counters and shift registers, Test #2 10/19 7.1, 7.3-7.5

11 Synchronous sequential circuit analysis 8.1-8.2

12 Synchronous sequential circuit design 8.3-8.4

13 Simulation and timing analysis of sequential circuits 8.5

14 Optimization of synchronous sequential circuits 9.1-9.4

15 Programmable logic devices, Test #3 11/30 5.3-5.4, 11.1-11.3

16 Semester review – Final Exam: Friday 12/12 4-6:30pm

Method of evaluating student performance: There will be three exams (contributing 20% each to the course grade) and a comprehensive final exam (contributing 20% to the course grade) in addition to homework/design projects (contributing 20% to the course grade). There will be no unannounced quizzes. All projects and assignments must be turned in on or before the designated time to receive credit. Each student is expected to do his/her own project or assignment. Discussion of various aspects of the project or assignment with fellow students is acceptable, provided that solutions are not copied. All assignments/projects will be posted on the ELEC 2200 class web page link on www.eng.auburn.edu/~vagrawal.

Class attendance and behavior: Students are expected to attend class regularly and on time. In case of absence, the student is responsible for all course business conducted in class. There should be no distractive talking or cell phone usage during class.

Computer usage: Some assignments will require the use of the AUSIM digital logic circuit simulation program which is available for downloading on the ELEC 2200 class web page link on www.eng.auburn.edu/~strouce.

Updated 8/17/08, adopted from original by Dr. C. E. Stroud. Page 1