EE 501 Lab 8 Constant gm circuit for rail to rail input common mode voltage

Objective:

  • To understand the constant gm input circuit (appendix 1).
  • To implement the circuit with low supply voltage.

Tasks:

Please read the appendix 1 before lab.

In this lab, we will use supply voltage of 2.2V.

From appendix, we know already that complementary input circuit can drive ICMR from rail to rail. However, the total gm of first stage is not in good shape as we see in appendix. To adjust the circuit so that we can get a constant gm to improve the linearity of opamp, a trick is been used. As the total gm of complementary input stage is:

,

To make the gm constant, we can first make the two parameter constant K as:

Therefore, the gm becomes:

If we can make a constant value during operation, then we get constant gm input stage. As shown in figure below.

Figure shown below is a structure for realizing constant gm by making both and constant. Assume that the mobility ratio between NMOS and PMOS is 3:1.

  1. When input is higher than VDD-VTP-Vdsat, PMOS input pair will be off, NMOS input pair (M3,M4) leaves with In=4*Iref. =
  2. When input is lower than VTN+Vdsat, NMOS input pair will be off, PMOS input pair (M1,M2) leaves with Ip=4*Iref. =
  3. When input is in the middle where both NMOS and PMOS input pair are in strong inversion, In=Ip=Iref. =

These three regions points out that with structure shown below, we get an input stage with almost constant square root current, therefore a constant gm input stage is obtained.

Build the constant gm circuit as shown above with similar size. Choose Vb1 -- Vb4 in appropriate range (you can try Vb1=Vb3=1.1V, Vb2=Vb4=1V). Simulate the circuit to get constant gm (do parametric sweep over Vicm and plot the sum of all 4 input transistors). Also plot the DC gain of the circuit.

Appendix:

  1. Analysis of complementary input stage:

To analyze the common mode input range of the NMOS differential input stage, a simplified diagram will be used as shown in figure below. Several modifications are made to the simple differential pair in actual implementation such as active loads and cascodes, however this is sufficient for the purpose of illustration. The range extends from the positive supply to Vgs,n+VDsat,b above the negative supply. This minimum voltage is needed to keep the NMOS differential pair and the tail current source in saturation.

A similar analysis can be carried out for the PMOS differential pair shown in figure below. The range extends from Vgs,n+VDsat,b below the positive supply to the negative supply. This minimum voltage is needed to keep the PMOS differential pair and the tail current source in saturation.

The simple differential pair can not meet the rail to rail common mode input requirement. A possible solution to the problem is to use both NMOS and PMOS differential pairs simultaneously. The resulting compound differential pair is called the complementary differential pair and is shown in figure below.

For low common mode input, the PMOS differential pair is in saturation and NMOS is off. For high common mode input, the NMOS differential pair is in saturation and PMOS is off. Therefore, the total effect is that the complementary differential pair is always working and the rail to rail common mode input requirement is met. It should be noted that for common mode input in the middle region both pairs are working, this will have a significant effect on the performance of the circuit. To understand the effect, we will investigate how the transconductance of each pair and of the complementary pair changes with common mode input signal. First the transconductance verses input common mode of the NMOS pair is shown in figure below.

Similarly, the transconductance verses input common mode of the PMOS pair is shown in figure below.

We see that the transconductance of each pair is almost constant over its common mode range and drops to zero outside this range. Combining these two graphs gives the transconductance verses input common mode of the complementary pair as shown in figure below. It is assumed here that both pairs in the complementary structure had been sized appropriately to obtain equal transconductance in their region of operation.