ECG 421–Digital Electronics
CATALOG DATA:
Analysis and design techniques for digital and mixed analog/digital circuits. CMOS and ECL logic families, multivibrators, Schmitt triggers and comparators, pulse generators, sample and hold circuits, and D/A and A/D converters.
TEXTBOOK:
[1] Sedra and Smith, “Microelectronics Circuits”, 4th Edition.
[2] Roberts and Sedra, “SPICE for Microelectronics Circuits”.
[3] Book by Gopalakrishnan
COORDINATOR:
Muthukumar Venkatesan, Assistant Professor
COURSE OBJECTIVES:
- Understand and analyze the Transfer Characteristics, noise margins, propagation delay, power consumption of various logic gates.
- Understand the working of CMOS based inverter, NOR, NAND gates, pass-transistor logic and CMOS transmission gate, latches, S-R flip-flop, SRAM and DRAM cells
- Understand the working of BJT based basic BJT inverter, BJT switching speed and saturation, basic NOR and NAND topologies. BJT switching, ECL Inverter, OR/NOR and other gates.
- Understand, design and analyzewave generator circuits, timers and oscillators..
- Understand and design basic concepts of DACs and ADCs.
COURSE OUTCOMES:
Students will be
- Design logic gates for implementing logic functions, inverters and flip-flops using BJTs and MOSFETs
- Able to identify the function being implemented by a CMOS or ECL digital circuit, and the factors affecting its performance.
- Analysis and design of logic gates and determine logic levels, (W/L), noise margins, and propagation delay.
- Realize memory elements (such as Latches and SRAM) using MOSFET
- Design and analyze clock/waveform generation circuits using with multivibrators, Schmitt triggers, and IC timers.
- Understand and design D-A data converter circuit realizations
PREREQUISITE:
ECG 300 (Formerly EEG 416)
TOPICS:
- Logic Gate Concepts: Transfer Characteristics, noise margins, propagation delay, power consumption.
- CMOS logic gates and storage elements:CMOS based inverter, NOR, NAND gates, pass-transistor logic and CMOS transmission gate, latches, S-R flip-flop, SRAM and DRAM cells
- ECL logic gates: BJT based basic BJT inverter, BJT switching speed and saturation, basic NOR and NAND topologies. BJT switching, ECL Inverter, OR/NOR and other gates.
- Mixed-signal timing and waveform generation: Monostable/bistable/astable multivibrator circuits, Schmitt trigger.
- Data Converters: basic concepts of DACs, transfer curve, resolution and accuracy, binary-weighted resistor realization, R-2R Ladder realization, bit-expansion methods, conversion speed. Basic concepts of ADCs, quantization levels and transfer curve, resolution and accuracy, tracking (counter) ADC, successive-approximations ADC, flash (parallel) converter, conversion speed, Sample and Hold circuit for ADCs.
LABORATORY PROJECTS:
PSPICE Simulation of various digital and mixed analog/digital circuits
DESIGN CONTENT:
1 Credit
CLASS SCHEDULE:
Lecture 2.5 hours per week
RELATIONSHIP BETWEEN COURSE AND PROGRAM OUTCOMES:
These course outcomes fulfill the following program objectives:
COURSE PREPARER AND DATE OF PREPARATION:
Venkatesan Muthukumar (version 2.1- 1 May 2002)