Bertrand B. Blanc

420 Blossom Hill Rd. – Suite 100
Los Gatos, CA-95032
Cell: +1 (408) 348-7966


Technology Facilitator in Data Management

Proven expert driven by product Time-to-Market & Quality improvement with wide SoC Register Management, IP assembly & connectivity, IP/sub-systems packaging for seamless integration, EDA 3rd party vendor roadmap driving.

  • Outstanding commitment to bring the absolute highest level of service and best practices to all clients.
  • Tackles every project with enthusiasm and a drive to find the best solution for the client and for the technical environment by taking a consultative approach to discovering needs and solutions.

CORE COMPETENCIES

Process Improvement ● Technology Deployment ● Software Development

Technology Evaluation ● System Design ● Architecture ● Process Reengineering

Infrastructure Design ● Procedure Development ● Quality Assurance

COMPUTER SCIENCE EXPERTISE

Methodologies: UML, design pattern, software life-cycles, OOD/OOP.

Web Technologies: HTML, XML, XSLT, CSS, PHP, JavaScript.

Operating Systems: Linux, Windows 9x-NTx, UNIX Solaris.

Database: Oracle, SQL, SalesForce.

Network: OSI, TCP/IP, sockets, protocols, administration notions.

SW languages: C/C++, lex/yacc, JAVA/JVM, Pascal, ADA95, scripts shell CSH/SH, CAML, TCL/TK.

HW languages: VHDL, Verilog, Esterel, IP-XACT.

Algorithmic: proof, space & time complexity, calculability, scalability, logics.

CRM: SalesForce.

File Management: ClearCase, CVS, BugZilla.

Edition: MS-Office (Word, Excel, PowerPoint, Outlook), Latex.

PROFESSIONAL EXPERIENCE

Last six years worked on-site at Texas Instruments Nice defining and driving next generation of WW Methodologies for

SoC Register Management

SoC Integration & Connectivity

IP Packaging

Flows, Methodologies, Tools Deployments & Trainings

10/2005-presentOwner & Principal Engineer at 3B Consultancy (Marseille, FranceLos Gatos, CA)

Designed leading-edge SoC Register Description language

EDA SW R&D and SW projects audits

EDA SW projects lead

Customers & 3rd parties follow-ups

06/2003-09/2008Consultant in SoC Methodologies at Texas Instruments (Villeneuve-Loubet, France)

Co-authored white paper: Endianness or Where is Byte 0?

Technical Lead of 3rd parties - Project Audit & Consultancy Services to meet milestones and customer satisfaction.

Involved & handled SoC Register Management, driving 3rd party dedicated tool creation.

Involved & handled SoC Connectivity & Assembly, driving 3rd party dedicated tool leading to dramatically speeding up SoC Integration thru automation.

Involved & handled IP & sub-system packaging, driving 3rd party dedicated tool leading to ease SoC assembly at upper level.

Represented TI to The SPIRIT Consortium aiming at standardizing IP-XACT, a format enabling communication from ESL to RTL in semiconductor flows.

Figured out some struggles faced in execution finding out viable both tactical and strategic solutions to resume R&D production. Handled on-site evangelism trainings.

09/2004-07/2005Technical Account Manager at Beach Solutions (FR, UK, US-CA) – Texas Instruments WW

Villeneuve-Loubet (Sophia-Antipolis great area), France

Pre-sales, post-sales, WW accounts follow-up (SoC Methodologies)

In-house toolset support (about 150 WW end-users)

Feedback to improve QA and tool features fitting customers needs

3rd parties follow-up around SPIRIT and OCP2 standards

03/2003-08/2004Consultant at Esterel Technologies – Texas Instruments, OMAPTM platforms

Villeneuve-Loubet (Sophia-Antipolis great area), France

Best paper award at SAME’04: MultiClock Design and Synthesis in Esterel

Defined methodologies with Esterel formalism to design and validate IP (6 months)

Supported and defined proposals, enhancements and improvements for registers capture

01/2002-09/2002Research internship at Institut National de Recherche en Informatique et Automatique,

Sophia-Antipolis, France.

Master’s Thesis: Translation of Pure Esterel v5 into Behavioral VHDL

Defined specifications and implemented a Pure Esterel to VHDL compiler. Esterel is a synchronous language devoted to specify, to implement, to prove, to synthetize real-time embedded systems.

2001-2002Internship, one year at Esterel Technologies in R&D department

Villeneuve-Loubet, France.

Defined specifications and implemented a Hardware Description Language test-bench generator for Esterel scenario generating equivalent stimuli in VHDL, Verilog and C.

1999-2000Internship, one year at Centre National de Recherches Scientifiques (Electronics and Computer Science Laboratory), Marseilles, France.

Defined specifications and implemented a language for real-time experiments pilot scheme.

EDUCATION

2000-2002Master of Science in Software Engineering (MSSE)

Ecole Supérieure en Sciences de l’Informatique (ESSI)

GraduateEngineeringSchool

University of Nice-Sophia-Antipolis, France

Graduated September 2002 with an advanced degree in Networking and Distributed Applications.

2001-2002Master of Philosophy (MPhil) in Computer Sciences

Doctorate School STIC

DEA – First year of a French Doctorate

University of Nice-Sophia-Antipolis, France

Obtained in July 2002 French “Diplôme d’Etudes Approfondies” in Networking and Distributed Applications.

1999-2000Master of Sciences in Computer Sciences (MSCS)

Centre de Mathématiques et d’Informatique

French Maîtrise in Computer Sciences

Université de Provence, Marseilles, France

Obtained in June 2000 with grade “assez bien” (equiv. B level pass). Coursework completed with MPhil degree obtained in 2002 leading to MSCS equivalence.

1998-1999Bachelor of Science in Computer Sciences (BSCS)

Centre de Mathématiques et d’Informatique

French License in Computer Sciences

Université de Provence, Marseilles, France

Obtained in June 1999 with grade “assez bien” (equiv. B level pass).

1995-1998French Undergraduate Degree

University of Provence, Marseilles, France

Diplôme d’Etudes Universitaires Générales Sciences A, Sciences et Structures de la Matière, mention Mathématiques et Informatique Appliquées aux Sciences.

Obtained a basic two-year degree in Mathematics and Computer Science.

1995French Baccalaureate

Lycée Saint Joseph Les Maristes, Marseilles, France

Baccalauréat "S" (scientific subjects, equivalent to "A" level). The natural sciences stream requires a high level in mathematics (which is very heavily weighed), physics & chemistry, and biology.
Grade: "bien" (high honours) equiv. 92%

LANGUAGE

French:mother tongue

English:second language

German:Goethe Institut, Marseille, France, obtained “Zertificat deutsch als Fremdsprache” (1995)

Arabic & Japanese:for a better understanding of Globalization, Localization & Internationalization in Software design

VISA

Authorized to work within the European Union (French Citizen)

Authorized to work within the United States of America (Green Card Holder)

REFERENCES

others upon request

"I appreciate your hard work and effort with all methodology involvements including IP-XACT that enabled TI to have a state-of-the-art packaging tool, and driving TI needs inside The SPIRIT Consortium. Thank you for all your inputs and experience in the register domain that enabled Xxxxxx and TI to create best-in-class EDA tool. You were a key team member defining next generation TI platform and we will miss your inputs. I wish you the best and good luck in the USA."

Dallas, TX, September 30th, 2008

Bob Maaraoui, Senior Member of the Technical Staff, Hardware Methodologies & EDA, Texas InstrumentsInc.

“Bertrand managed and supported our largest account and worked on site. His job was to be our point of contact for our customer while insuring our customer needs were communicated, delivered and tested in a timely manner. He also provided training and had a strong relationships with key managers in the company. Bertrand was very dedicated and was always willing to put in the extra hours to insure our customers were happy and well supported.”

San Jose, CA, September 21st, 2006

Douglas McCafferty, President and CEO, Beach Solutions Ltd.

“Bertrand worked on a new EDA tool at this periode, starting alsmost with 0 functionality delivered and managing to have the tools working in an usable flow for us. He managed to drige the EDA company producing this software and force them to increase quality, to introduce good process, etc.. He also intoduce new mathematical way to modelise object processed by this tool”

Villeneuve-Loubet, France, January 15th, 2008

Top qualities: Expert, High Integrity, Creative

Vincent Gillet, SoC Verification Leader, Texas Instruments S.A.