Barton L. Robison
959 So. 300 E.
Salt Lake City, UT 84111
(801) 359-2665
Technical Knowledge Computer Architecture, Digital Logic, VLSI Design, Verilog HDL, Assembly Language, C/C++, Java, HTML, Unix/Linux/Windows OS
Education
§ Senior in Computer Engineering at the University of Utah
§ Expected graduation date: May 2003
§ U of U Cumulative G.P.A. = 3.0
§ Engineering G.P.A. = 3.2
Elective Courses:
Advanced Computer Architecture, Operating Systems, Graphics, Computer Systems, VLSI Design, Digital Logic
Recent team projects:
Senior Research
“Gizmology” is an embedded space project. Its purpose is to design a rapid prototyping mobile component module architecture, used to develop spontaneous mobile devices. This is my senior thesis project. This project includes a set of five modules for I/O, processing, sensors, FGPA, and power supply. My responsibility is to design the I/O module. Currently, I am designing the board in digital logic using Powerview. The board contains an Intel PXA-250 processor, a FPGA used for signal routing, a CPLD, flash memory, SDRAM, an IR transceiver, RF transceiver, USB client, RS232, PCMCIA, audio output/input, and support for an LCD/touchpad. This module needs to communicate with other interchangeable modules and be able to be programmed to do a wide range of robust operations and functions. This is where the teamwork comes in. We needed to develop a way for these boards to communicate with each other. It is all a work in progress, but it is anticipated that I will finish the data path design and work out as many possible bugs in the design as possible. Right now I am realizing how difficult it is to connect every single pin of the PXA processor to the different components needed. My thesis proposal can be found online at http://www.cs.utah.edu/~robison/prethesis.html.
VLSI Design (Fall ’01)
This project was a version of the CR-16 processor from the transistor level to the board layout level. Team of five. Laying out the VLSI circuits in Cadence required the project to be broken up. In this case, I took charge of the ALU. The logic for the circuits was a snap, as I had done it once before. The difference in this project was I used Verilog more extensively. Verilog helped in the verification process. In the end, I saw many team members not care at all. This meant extra effort from the 3 of us who did care. The biggest effort was needed in the final verification, in the preparations for the design to be sent for fabrication, and in the final report. Looking back, I’d watch pay more attention to how others were doing, give more advice, and ask for more advice. We ended up completing the project, but having to redo much of the VLSI designs (they were HUGE!). We did not end up fabricating because of the requirement to come back in the next semester for testing purposes.
Asynchronous Design (Spring ’01)
This was a special purpose asynchronous processor to generate fractal designs. Team of three. The members of this group were very smart and hard workers. This project was our own original idea. I can now that we were doomed from the beginning. We only had one semester to complete this graphics chip, which included everything from writing a simple program to output the data from the chip to the monitor to developing an asynchronous floating-point multiplier. My main responsibility was to design the asynchronous floating-point adder. I received help from another team member about half way in, as he finished up the task of getting the data to the monitor. We gave it a monstrous effort, and in the end we barely finished the adder. The multiplier that the other team member swore would be easy flopped. I think the adder had a few bugs we could have worked out in another week or two, but time was up. If I had enough time, I would have liked to finish the adder in order to it fabricated. We should have chosen a simpler project and done all the research before we started to design parts of the adder.
Digital Logic Design (Fall ’00)
My first processor was a complete digital version of the CR-16 processor. Team of two (we lost one team member about one month into the project). The member we lost was the brain of the whole project. He had the entire processor laid out in his head. I had never designed a processor, and was somewhat uncertain about the details. When we lost him, I saw we were in trouble. I quickly took charge by finishing what I had going and trying to figure out the data path. The entire effort was trial and error. Studying the design guide of the CR-16, figuring out which bits went where, what happened with the sign extenders, where we needed muxes, etc. The teamwork was tough, as during the last three weeks of the project the remaining lab partner vanished. After long hours, I finally had a processor running simply programs, but with a buggy CMP instruction. I told my partner to make sure we had a good report. It is found online, complete with pictures of circuits, tests, and results at http://www.cs.utah.edu/~robison/cs3710/cs3710.html. It was this project that gave me the general overview of computer architecture I needed to excel in the rest of my architecture courses.
Lab work
Many other courses involved team work on labs, which were challenging and gave me the opportunity to work with many different types of team members. I saw it was much more important to work hard and work together than it was to work with a genius.
Work Experience Southeast Roofing Service, Inc.
1992 – present (summers fulltime, during school full/part time)
§ Position:
ü Lead-man on the roofing crew
§ Duties:
ü Solve problems on and off site
ü Motivate and train other crew members
ü Listen for the advice given from the crew and take charge of the decisions to be made about methods of work, specific roofing applications, and task management
ü Settle minor disputes to achieve teamwork
ü Determine daily completion goals
Goals, Skills, and Honors
§ Goal: MBA degree (night school, after graduation)
§ Fluent in Portuguese, semi-fluent in Spanish
§ Assistant Scout Master, Eagle Scout
§ I Love to Fish!