Bugs to Fix in New Versions

6/24/09TitlePage 1 of 3

Pin # / Preferred Function / Alternate functions / Connect to:
1 / PWM5 / P0[21], RD3, CAP1[3] / Half-bridge input
2 / CAP0[0] / P0[22], TD3, MAT0[0] / ENC0_CONN Phase A
3 / RD2 (CAN2) / P0[23]
4 / P1[19] / TRACEPKT3
5 / TD2 (CAN2) / P0[24]
6 / Vss
7 / Vdda(3V3)
8 / P1[18] / TRACEPKT2
9 / RD1 (CAN1) / P0[25]
10 / TD1 (CAN1)
11 / CAP0[1] / P0[27], AIN0, MAT0[1] / ADIO_CONN pin 2
12 / P1[17] / TRACEPKT1
13 / AIN1 / P0[28], CAP0[2], MAT0[2] / ADIO_CONN pin 5
14 / CAP0[3] / P0[29], AIN2, MAT0[3]
15 / AIN3 / P0[30], EINT3, CAP0[0] / Motor controller fault lines
16 / P1[16] / TRACEPKT0
17 / Vdd(1V8)
18 / Vss
19 / TXD0 / P0[0], PWM1
20 / ~TRST / P1[31]
21 / RXD0 / P0[1], PWM3, EINT0
22 / SCL (I2C) / P0[2], CAP0[0]
23 / Vdd(3V3)
24 / RTCL (JTAG) / P1[26] / Enables debug port when low at reset. Pulldown?
25 / Vss
26 / SDA (I2C) / P0[3], MAT0[0], EINT1
27 / SCK0 / P0[4], CAP0[1]
28 / P1[25] / EXTIN0 (for trace)
29 / P0[5] / MISO0, MAT0[1]
30 / MOSI0 / P0[6], CAP0[2]
31 / PWM2 / P0[7], SSEL0, EINT2
32 / P1[24] / TRACECLK
33 / TXD1 / P0[8], PWM4
34 / RXD1 / P0[9], PWM6, EINT3
35 / RTS1 / P0[10], CAP1[0]
36 / P1[23] / PIPESTAT2
37 / CTS1 / P0[11], CAP1[1]
38 / MAT1[0] / P0[12], DSR1, RD4
39 / MAT1[1] / P0[13], DTR1, TD4
40 / P1[22] / PIPESTAT1
41 / P0[14] Use as digital output only. / DCD1, EINT1 / Bootloader activated if this pin is low while reset is low. Include 25K pullup resistor.
42 / Vss
43 / Vdd(3V3
44 / P1[21] / PIPESTAT0
45 / EINT2 / P0[15], RI1
46 / CAP0[2] / P0[16], MAT0[2], EINT0
47 / SCK1 (SPI1/SSP) / P0[17], CAP1[2], MAT1[2]
48 / P1[20] / TRACESYNC / Trace port activation – don’t use as input
49 / Vdd(1V8)
50 / Vss
51 / Vdd(3V3)
52 / TMS (JTAG) / P1[30]
53 / MISO1 (SPI1/SSP) / P0[18], CAP1[3], MAT1[3]
54 / MOSI1 (SPI1/SSP) / P0[19], MAT1[2], CAP1[2]
55 / SSEL1 (SPI1/SSP) / P0[20], MAT1[3], EINT3
56 / TCK (JTAG) / P1[29]
57 / ~RESET
58 / Vssa(PLL)
59 / Vssa
60 / TDI (JTAG) / P1[28]
61 / XTAL2
62 / XTAL1
63 / Vdda(1V8)
64 / TDO (JTAG) / P1[27]
Signal function / Left terminal
height (in) / Right terminal height (in) / Comments
3V3 digital power output / 1.140 / 1.140 / Also available in many parts of the top and bottom layers.
Spare 1 / 1.080 / 0.990 / Left-right trace
Spare 2 / 1.050 / 0.975 / Left-right trace
5V0 power output / 1.020 / 0.960 / From linear LDO regulator
5V5 raw power output / 0.990 / 0.945 / From CAN connector
P0[14]/DCD1/EINT1/SBOOT / 0.960 / 0.930 / P41
P0[15]/RI1/EINT2 / 0.930 / 0.915 / P45
P0[16]/EINT0/MAT0[2]/CAP0[2] / 0.900 / 0.900 / P46
P0[17]/CAP1[2]/SCK1/MAT1[2] / 0.870 / 0.840 / P47
P0[18]/CAP1[3]/MISO1/MAT1[3] / 0.840 / 0.825 / P53
P1[21]/PIPESTAT0 / 0.810 / 0.810 / P44
P0[19]/MAT1[2]/MOSI1/CAP1[2] / 0.780 / 0.780 / P54
P0[20]/MAT1[3]/SSEL1/EINT3 / 0.750 / 0.750 / P55
P1[22]/PIPESTAT1 / 0.720 / 0.720 / P40
~RESET / 0.690 / 0.690 / P57
P0[13]/DTR1/MAT1[1]/TD4 / 0.660 / 0.660 / P39
P0[12]/DSR1/MAT1[0]/RD4 / 0.630 / 0.630 / P38
P0[11]/CTS1/CAP1[1] / 0.600 / 0.600 / P37
P0[10]/RTS1/CAP1[0] / 0.570 / 0.570 / P35
P0[9]/RXD1/PWM6/EINT3 / 0.540 / 0.540 / P34
5V5 raw power output / ----- / 0.521 / Another 5V5 point
P0[8]/TXD1/PWM4 / 0.510 / 0.510 / P33
P0[21]/PWM5/RD3/CAP1[3] / 0.480 / 0.480 / P1
P0[7]/SSEL0/PWM2/EINT2 / 0.450 / 0.450 / P31
P0[22]/TD3/CAP0[0]/MAT0[0] / 0.420 / 0.420 / P2
P0[6]/MOSI0/CAP0[2] / 0.390 / 0.390 / P30
P0[5]/MISO0/MAT0[1] / 0.360 / 0.360 / P29
P0[4]/SCK0/CAP0[1] / 0.330 / 0.330 / P27
P0[3]/SDA/MAT0[0]/EINT1 / 0.300 / 0.315 / P26
P0[27]/AIN0/CAP0[1]/MAT0[1] / 0.270 / 0.300 / P11
P0[2]/SCL/CAP0[0] / 0.240 / 0.285 / P22
P1[17]/TRACEPKT1 / 0.210 / 0.270 / P12
P0[1]/RXD0/PWM3/EINT0 / 0.180 / 0.255 / P21
P0[28]/AIN1/CAP0[2]/MAT0[2] / 0.150 / 0.240 / P13
P0[29]/AIN2/CAP0[3]/MAT0[3] / 0.120 / 0.225 / P14
P0[0]/TXD0/PWM1 / 0.090 / 0.210 / P19
P0[30]/AIN3/EINT3/CAP0[0] / 0.060 / 0.195 / P15
P1[16]/TRACEPKT0 / 0.030 / 0.030 / P16

Bugs to fix in new versions:

1) Use thermals to enable easier replacement of MicroMaTch connectors. The plastic housing can be lifted off, enabling the pins to be removed individually, but the ground and power pins are hard to get hot enough.

2) Consider using a latching 10-pin connector for the JTAG port, if there is room.

Created 11/21/08 by Jason Cortell Modified 11/22/2008 3:27 PM by Jason Cortell

CornellUniversityUnit1-LPC2194MCU-CAN-TechManual.doc