Worcester Polytechnic Institute Department of Electrical and Computer Engineering
ECE3801 Advanced Logic Circuits Term B’05
Exam 3: Thursday, 15December 2005
Write your name and ECE box at the top of this page.- Closed book, notes provided. Calculators permitted for computation only.
- Show all of your work. Use written English, where applicable, to provide a log of your steps. Always write neatly.
- Underline, circle or box each result.
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1)(20 pts) Use the Quine-McCluskey algorithm (by hand) to find the minimum SOP form of: F(W,X,Y,Z) = (2, 3, 6, 7, 10, 11) + d(0, 8). Show all of your steps.
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[More space for problem 1.]
2)(20 pts)Perform state minimization (by removing equivalent states) on the state transition diagram shown below. Use the “exhaustive” technique (or any method that removes all equivalent states). Your result should be the reduced state transition diagram (with a “key”).
[More space for problem 2.]
3)(30 pts)Using JK flip-flops, implement a state machine to output the repeating sequence (00, 01, 11, 10), also shown in the state transition diagram below. Assign don’t cares to the outputs and next states of any unused states. Minimize all combinational logic (sum of products form). Show your state transition table (with state assignment), logic synthesis and logic circuit schematic.
[More space for problem 3.]
4)(15 pts)In the circuit below, FF1and FF2 are used to reduce metastable circuit failures due to asynchronous changes in inputs X and Y, respectively. If = 1.5 ns, To = 0.4 s, the clock frequency is 8 MHz, and input changes occur asynchronously (with equal probability across the clock cycle) at an average rate of 70,000/s; then what is the mean time between failures (MTBF) for the output ofFF2? For this analysis, assume the output of FF1 generates no failures. For the 74LS74A, use timing information from the data sheet supplied with the exam. For all other parts, use LS TTL timing information from the exam note sheet.
5)(15 pts)For eachinstruction code provided to the circuit shown in the register-level diagram below, what function does the circuit perform; that is, what operation(s) are performed on the inputs X1 and Y1 to produce Z? (Note that “02C” and “12C” are the values zero and one, respectively, in two’s compliment representation.)
Put your solutions in the box below. In the instruction code, the first binary digit is the most significant.
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