Digital Logic Lab 07 - Serial to Parallel Shift Register

Name ______

In this laboratory experiment you will implement a sequential circuit using D-type flip-flops that accepts a serial data and outputs a data byte in parallel. You will also program the Arduino to generate the serial data stream to drive this circuit to control a seven-segment display.

Background - Almost all data that is transmitted over significant distances is converted to serial data streams and transmitted one bit at a time. In this experiment the Arduino will be used to generate serial data to drive a 7-segment display. The data will be captured in an 8-bit shift register built from a 74273 octal D-type flip-flop. The output of the flip-flops will be connected to the seven segments and the decimal point LED of the display.

"The 74F273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop’s Q output. All outputs will be forced LOW independently of Clock or Data inputs by a LOW voltage level on the MR input. The device is useful for applications where the true output only is required and the Clock and Master Reset are common to all storage elements."[*]

The pinout of the MAN 3910A Seven-Segment Display is shown below. Note that there are missing pins on this device, but the numbering is based on a standard 14-pin DIP IC.

1. Cathode A8. Cathode D

2. Cathode F9. Cathode D.P.

3. Common Anode10. Cathode C

4. No Pin11. Cathode G

5. No Pin12. No Pin

6. No Connection13. Cathode B

7. Cathode E14. Common Anode

Step 1: Assemble the circuit shown below using the 74273 and MAN3910A seven-segment display. Connect a 1K ohm resistor between the common anode and +V. Be sure to connect MR to +V to prevent a reset (or lockup) of the flip-flops.

This version of the software generates the bit sequences needed to drive the chosen seven-segment display with wired as shown in the circuit above. Any variation in either the display type or wiring of the seven segments will result in an unreadable display.

Step 2: Use Mode A to test and debug this circuit.

Question 1: Did your circuit operate correctly on the first try? ______If "NO" describe the problem and how you corrected it.

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Step 3: Verify each hexadecimal digit 0 thru F in mode b of the PDLP.

Question 2: Seven segment displays are typically used to display base 10 digits, only. There are a number of IC's available for driving seven segment displays. Why might you want to build your own seven-segment display driver circuit?

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Step 4: Demonstrate your circuit to the to the lab instructor using Mode C.

Passed ______

Review the PDLP software used in this laboratory experiment, as you answer the following questions:

Question 3: Why does the display flicker between each displayed digit?

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Question 4: What is the purpose of the D( ) array in the subroutine Seven_Seg_Serial( )?

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Question 5: The PDLP user can push 1's and 0's into the serial input of this laboratory circuit. What is the result of pushing the sequence 10101010 (entered from left to right)? That is, describe the display.

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Question 6: What bit-string should be pushed into the serial input to produce a capital "H" on the display?

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Comments: ______

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[*] Fairchild Semiconductor Datasheet - Octal D-Type Flip Flop, Copyright 2000, Fairchild Semiconductor Corporation DS009511, April 1988, Revised September 2000.